[Conference] CRISTEA, Miron, "Importance of Fundamental Theoretical Development in the Context of Modern Microelectronics Technology", Emerging Technologies, Communications, Microsystems, Optoelectronics, Sensors, ET CMOS, 2017


Computer simulation and device characterization are main activities in the microelectronics technology today. Most often computer simulation obscures the influence of the variables involved and many iterations are necessary until the desired result is obtained. A good model based on an analytical formula shows us clearly the influence of different variables and is also useful in device and material characterization, where old models proved inaccurate. In order to obtain new analytical formulas and better models, it can be necessary to return to basic, fundamental theory, as this work proves in two examples. The results can also be applied in other fields of engineering.


[Journal] RAVARIU, Cristian, "Deeper Insights of the Conduction Mechanisms in a Vacuum SOI Nanotransistor", IEEE Transactions on Electron Devices, vol. 63, no. 8, 2016, 2016, pp. pp. 3278 - 3283


C. Ravariu, Deeper Insights of the Conduction Mechanisms in a Vacuum SOI Nanotransistor, IEEE Transactions on Electron Devices, vol. 63, no. 8, 2016, pp. 3278 - 3283, Accepted in May 24, 2016, manuscript ID TED-2016-04-0613-R, DOI: 10.1109/TED.2016.2580180, IF=2.1.

[Book] CRISTEA, Miron, Dispozitive Semiconductoare de Putere - Îndrumar de Laborator, POLITEHNICA Press, București, 2016


Optimizarea parametrilor funcționali a dus la apariția de noi dispozitive semiconductoare de putere, utilizatorul trebuind să aleagă dispozitivul optim pentru aplicația sa, lucru realizabil doar în contextul cunoașterii de către acesta a funcționării și particularităților acestor dispozitive.

Acest îndrumar conține lucrări de laborator efectuate ca aplicații, două anexe cu abordarea teoretică a nivelului mare de injecție, o anexă cu modele suplimentare folosite în simularea PSPICE a dispozitivelor semiconductoare de putere și un breviar de comenzi PSPICE, inclusiv parametrii PSPICE tipici ai dispozitivelor semiconductoare de putere.

[Journal] HOBINCU, Radu, PETRICĂ, Lucian, GHEOLBANOIU, Alexandru, MOCANU, Dan, "Global Feedback Self-Programmable Cellular Automaton Random Number Generator", Revista Tecnica De La Facultad De Ingenieria Universidad Del Zulia, Volume 39, Issue 1, 2016, pp. 1-9


We present a cellular automaton (CA) based pseudo-random number generator (PRNG) which utilizes its own output to modify its internal rule set in order to produce a high-quality, cryptographically secure random number sequence. Previous work on self-programmable cellular automatons (SPCAs), i.e. CAs which can modify their own rule set,has utilized local feedback, whereby the state of each cell is utilized to select the next rule to be applied to the CA cell. We utilize instead a global feedback which selects a new rule, and a cell to which the new rule is to be applied, based on the entire CA state. We evaluate the quality of global feedback SPCA (GF-SPCA) utilizing the ENT and NIST statistical test suites. We also implement the GF-SPCA in field programmable gate array (FPGA) technology and evaluate its resource utilization. Our analysis demonstrates that the GF-SPCA is the first cryptographically strong SPCA, and is resource-efficient when implemented in FPGA, requiring under 300 look-up tables.

[Conference] DOBRESCU, Dragoş, DOBRESCU, Lidia, "Increased Transconductance MOSFET Device", CAS 2016,Sinaia, România, octombrie 2016, WOS: 391323300036, 2016
[Book] DASCĂLU, Monica, Self-Organizing Systems, Editura Politehnica Press (cod CNCSIS 19), Bucharest, Romania, 2016


Self-organization is one of the most interesting features of natural complex systems and may be simply defined as the manifestation of a global (macroscopic) order based upon microscopic processes, even in the absence of a central control subsystem.
The idea of self-organization, when applied to artificial systems such as computing architectures or computing models, refers to natural-inspired models and systems that are self-adjusting their structure and functionality in order to perform a useful task. The basic idea of natural-inspired computing models is that, reproducing some structural principal of the natural systems with complex phenomenology or functionality, the resulting artificial model would also reproduce the self-organizing properties.
Researchers are still trying to realize artificial systems inspired from nature that, starting from some basic features of the natural structures, would “copy” also the self-organization properties. Some of the computing models and systems that resulted from this modern scientific trend are analyzed in this book.


[Conference] GEORGESCU, Vlad, VADUVA, Alexandru George, "Controlling the Number of Equipments Powered from Photovoltaic Panels with Fuzzy Logic", ATEE 2015 (Advanced Topics in Electrical Engineering), 2015


A solution for better controlling the number of equipments which can be powered from photovoltaic panels is presented in this paper.

A hardware and software system is used for acquiring environmental data. These data are then sent to a fuzzy logic

software which decides the number of equipments that will be powered directly from the photovoltaic panels, with the rest beeing pluged into the national power grid.

Different ways of implementing the fuzzy logic are discussed, depending on the specific requirements: less power used from the national grid or less switching actions.

[Journal] GEORGESCU, Vlad, "Development of Three Didactical Laboratory Modules Based on Industrial SCADA Principles", Revista Carpathian Journal of Electronic and Computer Engineering (CJECE), 2015, pp. 13-16


This paper presents the design and implementation of three different didactic platforms, which are based on the SCADA systems principles and architecture. Principles from real industrial applications were put together in these modules in order to familiarize students with the domain and give them useful practical abilities. In this way, after they graduate, they will be able to faster integrate in the working field and meet more requirements an engineer should fulfill.
All three platforms have been implemented in a laboratory in Politehnica University of Bucharest.

[Journal] PETRICĂ, Lucian, ŞTEFAN, Gheorghe M., "Energy-Efficient WSN Architecture for Illegal Deforestation Detection", International Journal of Sensors and Sensor Networks, Volume 3, Issue 3, 2015, pp. 24-30


We present an energy-efficient wireless sensor network (WSN) architecture tailored for illegal deforestation detection. Illegal deforestation is a world-wide problem which may be prevented through improved monitoring of forested areas utilizing sensor networks equipped with chain-saw detection. Additional to detection, we identify sound source localization and sensor node localization as essential features of a deforestation monitoring WSN, and analyze two possible architectures which perform sound source localization with the distributed time difference-of-arrival (TDOA) algorithm and microphone-array based localization respectively. We develop an energy model and evaluate the two architectures. Our results indicate that the microphone array based WSN requires more hardware and is more complex, but is an order of magnitude more energy efficient than the distributed TDOA WSN as it minimizes radio traffic. This improvement in efficiency enables the microphone array equipped WSN to potentially operate for over a year, enabling practical deforestation monitoring with WSNs.

[Conference] ŞTEFAN, Gheorghe M., MALIȚA,Mihaela, "From Kleene's Model to the Parallel Abstract Machine", DACS 2015, Bucuresti, June, 2015, 2015


Parallel computation is mathematically de fined by Kleene's
model of partial recursive functions. The paper proves that only the compo-
sition rule is independent. Therefore, it is used to defi ne the Kleene Machine,
KM, and the Universal Kleene Machine, UKM, as the mathematical model
for parallel computation. The Map-Reduce parallel abstract machine model
is de fined starting from UKM.

Key words and phrases : mathematical model of computation, abstract
parallel machine, parallel computation, Kleene's recursive functions

Mathematics Subject Classifi cation (2000) : 03D75, 03D80.

[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Functional Language for Map-Reduce Architecture", ICTEI 2015, Chisinau, May, 2015, 2015


Functional forms proposed by John Backus are used to specify a MapReduce Architecture. The associated functional programming language is defined as a Scheme-like language.

Key words—parallel computing, parallel architecture, parallel programming, functional languages, Scheme-like programming language

[Conference] PETRICĂ, Lucian, GHEOLBANOIU, Alexandru, COTOFANA, Sorin, "Hybrid Adaptive Clock Management for FPGA Processor Acceleration", Design, Automation and Test in Europe (DATE), 2015, pp. 1359-1364


As FPGAs speed, power efficiency, and logic capacity are increasing, so does the number of applications which make use of FPGA processors. However, due to placement and routing constraints, FPGA processors instruction delay balancing is a real challenge, especially when the implementation approaches the FPGA resource capacity. Consequently, even though some instructions can operate at high frequencies, the slow instructions determine the processor clock period, resulting in the underutilisation of the processor potential. However, the fast instructions latent performance may be harnessed through Adaptive Clock Management (ACM), i.e., by dynamically adapting the clock frequency such that each instruction gets sufficient time for correct completion. Up to date, ACM augmented FPGA processors have been proposed based on Clock Multiplexing (CM), but they suffer from long clock switching delays, which could nullify most of the ACM potential performance gain. This paper proposes an effective FPGA tailored clock manipulation approach able to leverage the ACM potential. We first evaluate Clock Stretching (CS), i.e., the temporary clock period augmentation, as a CM alternative in FPGA processor designs and introduce an FPGA specific CS circuit implementation. Subsequently, we evaluate the advantages and drawbacks of the two techniques and propose a Hybrid ACM, which monitors the processor instruction stream and determines the optimal adaptive clocking strategy in order to provide the maximum speedup for the executing program. Given that CS has very low latency at the expense of limited accuracy and dynamic range we rely on it when the program requires frequent clock period changes. Otherwise we utilise CM, which is rather slow but enables the FPGA processor operation at the edge of its hardware capabilities. We evaluate our proposal on a vector processor mapped on a Xilinx Zynq FPGA. Our experiments indicate that on Sum of Squared Differences algorithm, Neural network, and FIR filter execution traces the hybrid ACM provides up to 14% performance increase over the CM based ACM.

[Journal] PETRICĂ, Lucian, VASILESCU, Laura, ION, Ana, RADU, Octavian, "IxFIZZ: Integrated Functional and Fuzz Testing Framework based on Sulley and SPIN", Romanian Journal of Information Science and Technology, Volume 18, Issue 1, 2015, pp. 54-68


Fuzzing has long been established as a way to automate negative testing of software components. While effective, existing fuzzing frameworks lack the necessary features to test stateful protocols in-depth. We propose using the modelling language Promela, and its interpreter SPIN, as an intuitive and generic way to describe protocol state machines, allowing the automatic generation of stateful fuzzing scripts for the popular Sulley fuzzing framework. Our approach involves the simulation of the Promela description in order for a set of valid protocol conversation sequences to be extracted. These sequences are then automatically modified by IxFIZZ, which inserts erroneous messages in the protocol conversation according to a set of heuristics. This approach also enables automatic analysis of test results against the protocol model and a tight integration of fuzzing with existing test-driven methodologies. We evaluated IxFIZZ against Linphone, a popular multi-platform SIP phone, to demonstrate the effectiveness of this approach, and compared the results to PROTOS, an established fuzzing framework for stateful network protocols. Our results indicate that IxFIZZ is able to detect more defects in the target software

[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "MapReduce Accelerator for Embedded Applications", BARC 2015, 2015


There are large classes of embedded applications
involving tightly interleaved complex and intense computations.
The solution we propose segregates the complex from the intense
in a many-core centered engine. We base our approach on
a map-reduce abstract machine model suggested by Kleene’s
mathematical model of computation. An actual MapReduce Accelerator
is described and is evaluated for various application
domains. Results, based on ASIC and FPGA implementations,
show > 10 improvements in area & energy use.

Index Terms—many-core, accelerators-based architecture, embedded
computation, MapReduce, computation model.

[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "MapReduce Programmable Accelerator for Neural Networks", ICAT 2015, 2015


The Neural Network computational paradigm is becoming more present in complex applications where it is integrated in heterogeneous systems implemented on general purpose computation systems. We propose the MapReduce general purpose architecture, able to support efficiently a wide spectrum of applications, including Neural Networks. For the Neural Network domain it provides 4TOPS (OP: 16-bit integer operation) powered with 12 Watt in 28 nm on 86 mm2, with 16 MB on chip memory.

[Journal] RAVARIU, Cristian, Elena Manea, Alina Popescu, Cecilia Podaru, Catalin Parvulescu, "Micro-Technological Steps During the Fabrication of an AcHE Biosensor Designated to the Environment Monitoring", American Journal of Bioscience and Bioengineering, vol. 3, issue 3-1, 2015, pp. 1-6

DOI: 10.11648/, ISSN:2328-5885 (Print), ISSN:2328-5893 (Online), indexare: WorldCat, CrossRef, Chemical Abstract Services, Electronic Journals Library, others.


Unfortunately, the pesticides pollute a large palette from environment: plants, organisms, soil and water. Using monitoring tools, like chemical biosensors, the use of pesticides can be put under control. Microelectronics offers the convenient transducers. Borrowing micro-technological processes, the enzymatic biosensors can be easily integrated onto the Silicon wafers. This paper proposes a biosensor for paraoxon pesticide detection, as a small piece from a decontamination soil technology plan. The paper reveals the pesticide detection principle, by paraoxon hydrolysis assisted by the Acetyl-cholinesterase enzyme, as key receptor. The enzyme is entrapped on a porous thin layer by adsorption. An advantageous method of the porous intermediate material anchored onto the Si-substrate, converting p-type Si in Si-porous by anodization, is described. Then, some technological steps, with tests and microscopy analysis are presented. Finally, the preliminary tests of the developed biosensor with the AcHE enzyme immobilized onto the Si-porous layer, are discussed.

[Journal] RAVARIU, Cristian, A. Bondarciuc, V. Bondarciuc, G. Alecu, "Non-polluting medical technology for environment and patient used in inflammatory diseases monitoring", Environmental Engineering and Management Journal, vol. 14, no. 4, ISSN: 1582-9596, IF=1, 2015, pp. 763-768

Received in 2010, accepted in 2012, published in 2015, Indexed ISI,  EBSCO Database, Chemical Abstracts Service/SciFinder (ACS), Index Copernicus Journal Master List, ProQuest, The National University Research Council (RO), CABI, EVISA, SCOPUS, Science Citation Index Expanded.


This paper presents a medical diagnosis method, based on the interaction of the infra-red laser beam and the human body, in a hospital environment, for inflammatory diseases, avoiding infected wastes. The main advantage of the laser bio-photometry is a rapid localization of the inflammation source, deep under the skin up to 5 cm, in emergency cases, when there is not enough time for classical medical procedures. Other advantages consist in the pollution absence for environment and patient, post-surgical monitoring possibility with minimum costs for sterilization, and consequently, it is non-dangerous to transmit infection from person to person being a non-invasive diagnostic technique. The studies concern the interaction particularities of the in vivo close infrared spectrum with the human tissues, extracting the average reflection coefficient in the intact tissues and in the pathologically modified tissues: edemas, hematomas, abscesses, others. The determined average reflection coefficient from the intact tissues is an index of the health-state having medium values between 55.7÷68mW, which are stable in time. The determined average reflection
coefficient in infrared spectrum, from the pathological modified tissues varies between
42÷58mW and it alters in time accordingly, with the evolution process. A clinical study of patients monitored by laser bio-photometry is presented. This non-invasive technique offers an objective parameter for injuries evolutions with roughly zero infected wastes during the investigated period. In this paper, the non-polluting properties of laser bio-photometry are highlighted, as a novel aspect of this medical method.

[Journal] DOBRESCU, Lidia, Gheorghe-Cristian Radulescu, "Radiation Dose Risk and Diagnostic Benefit in Imaging Investigations ", American Journal of Bioscience and Bioengineering, vol. 3, issue 3-1, 2015, pp. 1-6, DOI: 10.11648/,, 2015
[Journal] GEORGESCU, Vlad, "Test System for the Emplacement of Photovoltaic Panels", Revista Electrotehnică, Electronică, Automatică (EEA), 2015, pp. 16-22


This paper presents the design and realisation of a portable photovoltaic (PV) monitoring system which has the purpose of delivering data to help users establish the best position in which a number of photovoltaic panels should be placed in a specific location.
The system (hardware and software) is intented to be used before the actual installation of the panels, in order to gather and store data, beeing in this way different from the usual kits for measuring panel activity after installation.
A set of actual data, recorded over a certain period, is also presented.


[Conference] DOBRESCU, Lidia, STANCIU, Silviu, "A New System for Recording the Radiological Effective Doses", International Congress of Radiology (ICR) 2014, 2014


In this paper the project of an integrated system for radiation safety and security of the patients investigated by radiological imaging methods is presented. The new system is based on smart cards and Public Key Infrastructure. The new system allows radiation effective dose data storage and a more accurate reporting system.
[Conference] DOBRESCU, Lidia, "Domotic Embedded System", The 6th Edition of IEEE Electronics, Computers and Artificial Intelligence International conference, 2014


This paper presents an original domotic embedded system for room temperature monitoring. The OpenRemote is the main software interface between the user and the system, but other software components and communication protocols are used, such as 1-Wire protocol for temperature monitoring devices, RS-232 for the central PC unit and OWFS software for remote control using Android mobile devices. The system architecture consists in hardware and software components to remote control a room temperature parameter for energy efficiency increasing.
[Conference] BURILEANU, Corneliu, BURILEANU, Dragoş, CUCU, Horia, PETRICĂ, Lucian, BUZO, Andi, "An Automatic Speech Recognition Solution with Speaker Identification Support", 10th International Conference on Communications (COMM), 2014
[Conference] BURILEANU, Corneliu, CUCU, Horia, PETRICĂ, Lucian, BUZO, Andi, "A Robust Diacritics Restoration System using Unreliable Raw Text Data", 4th International Workshop on Spoken Language Technologies for Under-Resourced Languages (SLTU), 2014
[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Can One-Chip Parallel Computing Be Liberated From Ad Hoc Solutions? A Computation Model Based Approach and Its Implementation", 18th International Conference on Ciruits, Systems, Communications and Computers (CSCC 2014), Santorini Island, Greece, July 17-21, 2014, 2014, pp. 582-597


In July 2010 David Patterson said in IEEE Spectrum that “the
semiconductor industry threw the equivalent of a Hail Mary pass
when it switched from making microprocessors run faster to putting
more of them on a chip – doing so without any clear notion of how
such devices would in general be programmed” warning us that
one-chip parallel computing seems to be in trouble. Faced with
the problems generated by all those ad hoc solutions, we propose
a fresh restart of parallel computation based on the synergetic
interaction between: (1) a parallel computing model (Kleene’s
model of partial recursive functions), (2) an abstract machine
model, (3) an adequate architecture and a friendly programming
environment (based on Backus’s FP Systems) and (4) a simple
and efficient generic structure. This structure is featured with an
Integral Parallel Architecture, able to perform all the five forms
of parallelism (data-, reduction-, speculative-, time- and thread-
parallelism) which result from Stephen Kleene’s model and is
programmed as John Backus dreamed. Our first embodiment
of a one-chip parallel generic structure is centered on the
cellular engine ConnexArrayTM which is part of the SoC BA1024
designed for HDTV applications. On real chips we measured
6GOPS/mm2 and 120GOPS/Watt peak performance.

Index Terms—Parallel computing, recursive functions, parallel
architecture, functional programming, integral parallel compu-

[Journal] CRISTEA, Miron, "Capacitance-voltage Profiling Techniques for Characterisation of Semiconductor Materials and Devices", Emerging Trends in Electrical, Electronics & Instrumentation Engineering: An international Journal (EEIEJ), Vol. 1, No. 3, August 2014, 2014, pp. 29-38


A new capacitance-voltage profiling technique of semiconductor junctions is proposed for characterisation of semiconductor materials and devices. The measurement technique is simple, non-destructive and it has a greater accuracy compared with the classical C-V method of J. Hilibrand and R. D. Gold, developed in 1960.
Keywords: Capacitance-voltage, Profiling Technique, Semiconductor Junctions, Materials & Devices

[Conference] HOBINCU, Radu, PETRICĂ, Lucian, GHEOLBĂNOIU, Alexandru, MOCANU, Dan, "Cellular Automaton pRNG with a Global Loop for Non-Uniform Rule Control", 18th International Conference on Circuits, Systems, Communications and Computers (CSCC), 2014, pp. 415-420


Pseudo-random number generation is an important ingredient of many cryptography applications, as well as scientific applications based on statistical sampling, e.g., Monte Carlo methods. Several methods have been proposed for generating pseudo-random numbers, but these are generally either (i) based on cryptographic cypher algorithms and expensive to implement in hardware (e.g., large silicon area, low energy efficiency) or (ii) based on linear-feedback shift registers, which can be efficiently implemented in hardware but are not sufficiently random.
This paper presents a pseudo-random number generator which utilzes a configurable cellular automaton network which generates the output stream of numbers, and a feedback loop which monitors the randomness properties of the output stream and adjusts the parameters of the network in order to optimize its cryptographic performance. We demonstrate that introducing this additional feedback loop increases the overall entropy of the system, improving the quality of the pseudo-random sequence over other cellular implementations or LFSRs. We also analyze the effect of multiple configurations of the proposed generator architecture. We evaluate the generator against several standard benchmarks to illustrate its performance and we also provide an evaluation of its hardware implementation which demonstrates comparable implementation efficiency to LFSRs.

[Journal] RAVARIU, Cristian, "Compact NOI Nano-Device Simulation", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, pp. 1841 - 1844

vol. 22, issue 8, DOI:10.1109/TVLSI.2013.2278474

[Book Chapter] BABARADA, Florin, RAVARIU, Cristian, Doru Ursutiu, Constantin Ionescu Tirgoviste, Arhip Janel, Sorin Arama, Cornel Samoila, Electronic circuits dedicated for new platforms in electrophysiology, Lux Libris Publishing House, Brasov, 2014

Abstract book, CD with ISBN 978-973-131-280-4, with Editors Mihaela Badea, Marius Moga, Patrizia Restani, Jean Marty


Besides to some classical protocol in electrophysiology, like ECG or EEG, novel techniques were recently developed: Electro-oculogram [1], Electro-hepatogram or Electro-gastrogram, [2]. One more flexible future solution can be use the Cypress PSoC (PSoC 1,3,4,5) technologies. The PSoC1 embedded system is a programmable single-chip, including configurable analog and digital peripheral functions, analog and digital buss, memory and microcontroller [3].
Searching the pancreatic electrical signal, we developed a hardware solution. The analog block is based on a dynamic range compressor, containing the automatic gain control block and a clipper block. At clipper output a lowpass filter is connected since to abruptly cut the high frequencies, like 50Hz, ECG. The data vector recording is performing by ATMega32 microcontroller, including ten bits A/D conversion port, [4].

[1]. Malcolm Brown, et al. ISCEV Standard for Clinical Electro-oculography (EOG) 2006, Doc Ophthalmol 113 (2006) 205–212.
[2]. Lammers WJEP, et al. Origin and propagation of the slow wave in the canine stomach: the outlines of a gastric conduction system, Am J Physiol Gastrointest Liver Physiol 296 (2009), 1200–1210.
[3]. C. Ravariu, D. Ursutiu, F. Babarada, J. Arhip, S. Arama, G. Radulian, C. Samoila. Remote Measurements of the Gastric Electrical Signals, IEEE Conference on Remote Engineering and Virtual Instrumentation, Portugal, (2014), 281-284.
[4]. F. Babarada, C. Ravariu, J. Arhip. Electrophysiological Data Processing Using a Dynamic Range Compressor, IEEE Conference on Data Compression, Italy, (2011), 257-262.

[Conference] BÎRĂ, Călin, HOBINCU, Radu, PETRICĂ, Lucian, CODREANU, Valeriu, COȚOFANĂ, Sorin, "Energy-Efficient Computation of L1 and L2 Norms on a FPGA SIMD Accelerator, with Applications to Visual Search", 18th International Conference on Circuits, Systems, Communications and Computers (CSCC), 2014, pp. 432-437


This paper presents a novel accelerator architecture which is SIMD in nature and fully programmable. It provides support in an energy effective manner to a wide range of vector computations, including scalar products and similarity metrics like sum of absolute differences and sum of squared differences. We have evaluated an implementation of the proposed architecture on the Xilinx Zynq-7000 EPP featuring the ARM Cortex-A9 processor, running a SIFT descriptor matching benchmark. Our results indicate that the processor can offload the most intensive computational kernels of the benchmark to the accelerator, thus delivering 4-6x better matching throughput than the ARM processor alone. Moreover, the execution of the SIFT matching benchmark on the accelerated platform consumes 3x less energy than on the ARM Cortex-A9, at a similar power consumption. Our results also suggest that the accelerated ARM system is 40% more energy effective than Intel Core i7 2600K and Nvidia GTX680 when executing the SIFT matching benchmark.

[Book] DOBRESCU, Lidia, "From the natural language to programming and modeling", 2014, pp. 112

ISBN 078-606-23-0311-2

[Journal] POPA, Cosmin, "“Improved Accuracy Current-Mode Multiplier Circuits with Applications in Analog Signal Processing“", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 22, Issue: 2, 2014, pp. 443-447
[Conference] RAVARIU, Cristian, M. Gherasim, A. Glavan, B. Robu, M. Badea, M. Chitu, "Integrated biosensors using active electronic devices", International Conference - New Trends on Sensing- Monitoring-Telediagnosis for Life Sciences- NT-SMT-LS, organised by Transilvania University of Brasov, Romania, July 24-26, 2014;, 2014, pp. 33

Abstract book, ISBN 978-973-131-280-4, CD with Editors Mihaela Badea, Marius Moga, Patrizia Restani, Jean Marty


The nowadays biosensors integrate in the same chip the biological receptors (enzymes, antibodies) with an active device as transducer. Therefore, the biomaterials coupling to semiconductor devices are considered a first priority in bioscience [1], permitting to integrate in a minimum area an entire electrochemical and transducer chain. The effects are: minimal invasive medical tests, minimum quantity of wastes, reduced costs and aviability of these biodevices for personalized home-care.
Recently, some glucose biosensor based on glucose oxidase (GOX) receptor entrapped on self-assembling of multiwall carbon nanotubes [2] or nanostructured TiO2 [3], was reported. For antibody immobilization, the literature recommends the graphene or Si-porous [4] as intermediate layer. We designed and manufactured a Bio-FET transistor with the GOX enzyme immobilized on TiO2-nanotubes.

[1]. Malika Ammam. Electrochemical and electrophoretic deposition of enzymes, Biosensors and Bioelectronics, 58 (2014) 121-131.
[2]. P. R. Dalmasso et al. Supramolecular architecture based on the self-assembling of multiwall carbon nanotubes dispersed in polyhistidine and glucose oxidase, Biosensors and Bioelectronics 39 (2013) 76–81.
[3]. C. Ravariu et al. Titanium dioxide nanotubes on silicon wafer designated for GOX enzymes immobilization, Digest Journal of Nanomaterials and Biostructures, 6 (2011) 703 - 707.
[4]. Qin Wei et al. A novel label-free electrochemical immunosensor based on graphene, Sensors and Actuators 149 (2010) 314–318.

[Conference] RAVARIU, Cristian, Laura Georgeta Alecu, Cristian Ravariu, Mihai Laurentiu Vladoianu, Mihai Idu, "Interaction with radiations of the electron devices and circuits working in telecommunication", 9th International Workshop of Electromagnetic Compatibility, CEM14, 3 – 5 Sept. 2014, Timişoara - Romania, 2014
[Conference] BABARADA, Florin, CRISTEA, Miron, ENACHE, Ioan, RAVARIU, Cristian, RUSU, Ion, E. Manea, C. Parvulescu, J. Arhip, "Manufacturing of Capacitive Electrodes on Si-substrate for Electrophysiological Applications", 37-th IEEE InternationalAnnual Conference of Semiconductors, 13-15 Oct, 2014, Sinaia, Romania, 2014, pp. 151-154


The usual electrodes from electrophysiology are resistive. A variable metal-skin contact resistance frequently generates unpleasant artifacts. The capacitive electrodes avoid this disadvantage and are suitable for variable biosignals recording. The main novelty of this paper is the manufacturing of capacitive electrodes with all terminals on the top surface, letting free the electrode bottom for physiological preparations. So, the paper firstly presents the TCAD techniques used for the design of some capacitive electrode using three mask levels. By EDA, L-EDIT tools, the layers that constitute the fabrication masks are transferred to the glass support. In the last part, the electrodes technological flow design and testing in a real electrophysiological platform using the capacitive electrodes, are presented.

[Conference] ŞTEFAN, Gheorghe M., "MapReduce - an Integrative Paradigm in Cyber-Physical Systems", Proceedings of The Third International Workshop on Cyber-Physical Systems, May 2014, 2014


MapReduce is presented as the ubiquitous mechanism used in the coming Cyber-Physical
System architectures, from elementary digital circuits to cloud computation. The composition
rule, defined in Stephen Kleene’s model of computation, comes across all the fundamental
mechanisms involved in the informational technologies at any level. The two levels of the
Kleene’s composition correspond to the two aspects of the proposed integrative paradigm:
the map level and reduce level.

[Poster Presentation] RAVARIU, Cristian, A. Voina, G. Alecu, C. Ravariu, C. Voina, "Monitoring system of air quality", International Conference - New Trends on Sensing- Monitoring-Telediagnosis for Life Sciences- NT-SMT-LS, 2014, pp. 32


Prevention and monitoring of air pollution are issues of public, national and international interest. Much of the current environmental issues can be controlled or reduced through the development of monitoring programs based on the best scientific and technical solutions for measuring and quantifying the specific environmental indicators.
Taking into account that air pollution is one of the most debated issues in the world, in this paper is proposed a solution for the development of a system for data acquisition and monitoring of air quality and appropriate software application. The proposed software application allows reading, acquisition and monitoring of analog signals, voltages and currents (unified signals 0 ... 10V, 4 ... 20mA) to analyze the concentrations of main air pollutants, the program enabling and optical and acoustic signaling when the pollutants exceed admissible limits. Also this application allows the visualization and graphic representation of signals acquired in real time on the computer where is connected the acquisition board. Continuously acquired data are automatically stored in a database to be sent via Internet to a central station or a server for analysis, processing and interpretation thereof. Following these operations the human operator can take fairly and expeditiously decisions on emerged technological risks.

[Conference] BURILEANU, Corneliu, BURILEANU, Dragoş, CUCU, Horia, BUZO, Andi, "Recent Improvements of the SpeeD Romanian LVCSR System", 4th Workshop on Spoken Language Technologies for Under-Resourced Languages (SLTU), 2014
[Conference] BABARADA, Florin, RAVARIU, Cristian,  D. Ursutiu, J. Arhip, S. S. Arama, G. Radulian, C. Samoila, "Remote Measurements of the Gastric Electrical Signals - Between Theory and Practice", 11-th Internat. IEEE Conference on Remote Engineering and Virtual Instrumentation, Porto, Portugal, 26-28 Feb 2014, contrib. no. 97, Proceedings, 2014, pp. 281-284


The paper analyses the gastric signal acquiring with electrodes, placed at few centimeters distance from the gastric tissue. The electrogastrography EGG was accurately extracted as invasive method, by penetrating needles into the stomach walls since 15 years ago. Relatively recent, a non-invasive method, based on skin electrodes on the abdominal region, was investigated as a remote organ test. The technical and medical particularities for the EGG signal recording are presented. The paper presents a versatile solution for the acquiring, filtering and processing of the cutaneous electrophysiological signal recording from the abdominal skin. Low-pass filters coupled to band pass filters are connected in order to abruptly cut higher frequencies than 50-25Hz and to allow the useful signal transmission. The data vectors are recorded by a specialized medical analog platform ADS1298 and transmitted to a mobile PC. This allows a subsequent digital signal processing, followed by a signal characterization.

[Conference] GEORGESCU, Vlad, "SCADA Software used in Dispatch Centre for Photovoltaic Parks", ECAI - 2014 Electronics, Computers and Artificial Intelligence, 2014, pp. 1-5


In this paper I used a classic SCADA software as a base for implementing a dispatch center for solar parks, which must respect the newest regulations in Romanian legislation.

In order to adapt the existing softwares to the project, I implemented these technologies on top of the SCADA software: drivers for electrical communications, special interfaces for electrical operators, industrial database for storing the collected data.

At the end of the paper I present the exact way I implemented this technologies together and the adaptations that were required.

[Journal] RAVARIU, Cristian, Ala Bondarciuc, "The sensitivity in the IR spectrum of the intact and pathological tissues by laser bio-photometry", Laser in Medical Science Springer Journal, 2014, pp. 581-588

Volume 29, Issue 2,  DOI 10.1007/s10103-013-1358-6


In this paper, we use the laser biophotometry for in vivo investigations, searching the most sensitive interactions of the near-infrared spectrum with different tissues. The experimental methods are based on the average reflection coefficient (ARC) measurements. For healthy persons, ARC is the average of five values provided by the biophotometer. The probe is applied on dry skin with minimum pilosity, in five regions: left-right shank, left-right forearm, and epigastrium. For the pathological tissues, the emitting terminal is moved over the suspected area, controlling the reflection coefficient level, till a minimum value occurs, as ARC-Pathological. Then, the probe is moved on the symmetrical healthy region of the body to read the complementary coefficient from intact tissue, ARC-Intact, from the same patient. The experimental results show an ARC range between 67 and 59 mW for intact tissues and a lower range, up to 58-42 mW, for pathological tissues. The method is efficient only in those pathological processes accompanied by variable skin depigmentation, water retention, inflammation, thrombosis, or swelling. Frequently, the ARC ranges are overlapping for some diseases. This induces uncertain diagnosis. Therefore, a statistical algorithm is adopted for a differential diagnosis. The laser biophotometry provides a quantitative biometric parameter, ARC, suitable for fast diagnosis in the internal and emergency medicine.

[Journal] BÎRĂ, Călin, ŞTEFAN, Gheorghe M., GUGU, Liviu, MALIȚA, Mihaela, "Transpose-MapReduce Applications on Connex Architecture", ROMJIST, Volume 17, Issue 2, 2014, 2014, pp. 150–176


The MapReduce architecture and the associated programming model
de nfied for the one-chip Connex organization gets an important additional
feature: the associated data vectors can be organized as a two-dimension
arrays of vertical and horizontal vectors which are managed by the trans-
pose operation in order to maximize the degree of parallel execution.
Thus, a one-chip Map-Reduce engine is able to perform easy additional
intra vector operations by transforming the horizontal vectors, involved
in Map operations, in vertical vectors using the transpose operation. We
propose the Transpose-MapReduce high-level architecture supported by
a fine grain cellular structure: the Connex system already implemented
in silicon. It is structured in three sub-architectures: the data processing,
data transfer and inter-cell communication architectures. A simulator
written in SCHEME is used to write and evaluate few meaningful algo-
rithms: AES encryption, FFT, Batcher's merge-sort.

[Conference] DOBRESCU, Lidia, "Replacing ANSI C with other modern programming languages", IEEE International Symposium on Fundamentals of Electrical Engineering 2014, 2014


Replacing ANSI C language with other modern programming languages such as Python or Java may be an actual debate topic in technical universities. Researchers whose primary interests are not in programming area seem to prefer modern and higher level languages. Keeping standard language ANSI C as a primary tool for engineers and for microcontrollers programming, robotics and data acquisition courses is another strong different opinion trend. Function oriented versus object oriented languages may be another highlighted topic in actual debates.


[Conference] PETRICĂ, Lucian, MARȚIAN, Alexandru RADU, Octavian, "Cognitive Radio Testing Framework based on USRP", 21st Telecommunications Forum (TELFOR), 2013, pp. 212-215


Spectrum scarcity has become one of the most important problems to be solved in order to ensure the coexistence of the large number of modern communication systems. Cognitive radio (CR) technology has been considered a promising solution for enabling dynamic spectrum access and by that addressing this problem. Since its inception more than 10 years ago, several standardization activities have contributed to illustrating the potential of CR for commercial use. Meanwhile, worldwide efforts from agencies such as the Federal Communications Commission (FCC) have been deployed in order to remove regulatory barriers for future development of CR networks. A flexible testing framework for CR devices implemented using the Universal Software Radio Peripheral (USRP) Software Defined Radio (SDR) platform is proposed and described, together with a case study on a commercially available device. The requirements imposed by the 802.11h standard are verified on this device and a number of discovered issues are presented and discussed.

[Journal] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Control Global Loops in Self-Organizing Systems ", ROMJIST, Volume 16, Issues 2-3, 2013, 2013, pp. 177–191


Self-organizing systems are used to model complex or at least
apparent complex behaviors. The idea currently in use is to study global be-
haviors based only on xed and local rules. The emergence of a speci c global
behavior depends too strongly on the initial state of the system. This chaotic
aspect can be avoided adding, besides the local loops, a global control loop
to balance the too big \local freedom". The global loop can be used to tune
the local behavior so as the entire system becomes more stable. Using vari-
ous reduction functions some global parameters are extracted from the system
and sent back locally to the elements of the system. The information received
locally through the global loop is used to \tune" the local behavior. So the
self-organized system becomes \less self-organized", but more exible in main-
taining its global state in prescribed limits. In order to illustrate the idea, the
paper presents simple examples of cellular automata with global loops.

[Book] POPA, Cosmin, "“Current-Mode Analog Nonlinear Function Synthesizer Structures”", 2013
[Journal] ŞTEFAN, Gheorghe M., "Formă și fenomen în muzică", Lettre Internationale, Issue 88, 2013, 2013, pp. 40-42
[Journal] POPA, Cosmin, "“Low-Voltage CMOS Current-Mode Exponential Circuit with 70dB Output Dynamic Range”", Microelectronics Journal, Volume: 44, Issue: 12, 2013, pp. 1348-1357
[Conference] BÎRĂ, Călin, ŞTEFAN, Gheorghe M., GUGU, Liviu, MALIȚA, Mihaela, "Maximizing the SIMD Behavior in SPMD Engines", Proceedings of the World Congress on Engineering and Computer Science 2013 Vol I WCECS 2013, 23-25 October, 2013, San Francisco, USA, 2013, pp. 156-161


Almost all one-chip parallel architectures are unable
to reach a maximum degree of parallelism in performing
real applications, mainly due to their weak or too costly
support for interconnections between the computational cells.
Minimizing or “hiding” the inter-cell communication, totally or
partially, is the way we use to improve the degree of parallelism.
Few typical algorithms – AES encryption, FFT, Batcher’s
mergesort – are adapted for this purpose. Our approach is
supported by a fine grain cellular structure – implemented
as the Connex system – featured with enough big local data
memory. A high level architectural description for the SPMD
system Connex, and a simulator in SCHEME are used to write
and evaluate our approach.

Index Terms—parallel computing, parallel algorithms, AES,
FFT, Batcher’s sort.

[Journal] ŞTEFAN, Gheorghe M., "Mintea de copil a lui Turing ", Lettre Internationale, Issue 86, 2013, 2013, pp. 44-47.
[Journal] BÎRĂ, Călin, HOBINCU, Radu, PETRICĂ, Lucian, "OPINCAA: A Light-Weight and Flexible Programming Environment For Parallel SIMD Accelerators", Romanian Journal of Information Science and Technology, 2013, pp. 336-350

Volume 16, Number 4


The programming environment is often a key enabler of productivity and performance in any software development project. In a hardware-software co-design scenario, the programming environment must easily adapt to changes in the parameters of the underlying hardware computation platform, and must be able to accurately measure the performance of the hardware in order to guide software development. In this paper we present OPINCAA, a framework for programming parallel accelerators which implement the ConnexArray architecture. OPINCAA provides a C++ syntax for accelerator software development, and the infrastructure for dispatching instructions to the accelerator. OPINCAA is also designed to easily interface with architectural and circuit-level simulators, and provides tools for performance analysis and automatic tuning of accelerator code. We evaluate OPINCAA in conjunction with a FPGA implementation of the ConnexArray, and demonstrate how it can be used to develop, debug, and optimize vector applications.

[Journal] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Real Complexity vs. Apparent Complexity in Modeling Social Processes", ROMJIST, Volume 16, Issues 2-3, 2013, 2013, pp. 131–143


Complexity science, developed in the last few decades, starts
from the unproved presupposition that the foundations of the processes which
manifest themselves as complex are simple. Thus, it was easy to build quickly
various models for complex processes. But, in the current stage of development
we start, little by little, to become aware of the main limitations introduced
by the deep simplicity hypothesis. Indeed, it is hard to explain the high phe-
nomenological complexity by deep structural simplicity. Between phenomenon
and structure we propose the intermediate concept of architecture, as a support-
ing environment for maximizing the complexity captured in our models.

[Journal] RAVARIU, Cristian, "Semiconductor Materials Optimization for A TFET Device with Nothing Region On Insulator", IEEE Transaction on Semiconductor Manufacturing, vol. 26, issue 3, 2013, pp. 406-413

DOI: 10.1109/TSM.2013.2258411


This paper presents the work regimes of an atypical SOI device. The proposed device belongs to the Tunneling FET class, but the main body is a vacuum cavity. Each layer has a maximum of 10 nm. Firstly, the paper studies the static characteristics of the proposed device by simulations for different semiconductor materials: Si, SiC and Ge, with different doping concentrations, in different bias conditions. Secondly, some key parameters are defined in order to establish the boundary of the different work regimes. The normal work regime is conditioned by the useful tunneling occurrence, maximum transconductance, and current capability, far away from the insulator breakdown that means a non-useful back-gate leakage current. The simulations reveal optimum Semiconductor-Vacuum-Semiconductor structures On Insulator for heavy doped films, thin oxides, and larger band gap materials. An optimum balance is offered by the SiC device with 10 nm thickness on 10 nm insulator with a cavity width of 2 nm.

[Journal] RAVARIU, Cristian, "The residual doping concentration estimation in a SIMOX film using current measurements", IET Science Measurement & Technology Journal, vol. 7, issue 1, 2013, pp. 1-6



In situ measurements of static characteristics for an ad-hoc silicon-on-insulator (SOI) device represent an important method for SOI technologies characterisation. The Separation by IMplanted OXygen (SIMOX) technique is based on oxygen ions implantation into Si-film. After annealing, an increased doping concentration was reported, because of the residual oxygen clusters within the film, giving rise to oxygen thermal donors. Therefore this study offers an original algorithm for doping concentration estimation in these SOI films. A specific device used for in situ electrical characterisation of SOI wafers is the pseudo-metal oxide semiconductor (MOS) transistor. In this study, the doping concentrations extraction is based on graphical solution of a non-linear equation and third-order derivative zeroing of the measured static characteristics. In this scope, experimental curves ID-VG, in inversion and accumulation were experimentally measured for a pseudo-MOS transistor made in SIMOX technology. In this situation, the threshold and flat-band voltage are extracted, free of classical conventions. The extracted doping concentration in film is roughly 5.8 × 10^15 cm- 3; also the conductivity is changed from p to n in film, as the literature predicted.

[Conference] PETRICĂ, Lucian, CODREANU, Valeriu COȚOFANĂ, Sorin, "VASILE: A Reconfigurable Vector Architecture for Instruction Level Frequency Scaling", Faible Tension Faible Consommation (FTFC), 2013


Coarse-grained dynamic frequency scaling has been extensively utilised in embedded (multiprocessor) platforms to achieve energy reduction and by implication to extend the autonomy and battery lifetime. In this paper we propose to make use of fine-grained frequency scaling, i.e., adjust the frequency at instruction level, to increase the instruction throughput of a FPGA implemented Vector Processor (VP). We introduce a VP architectural template and an associated design methodology that enables the creation of application requirements tailored VP instances. For each instance, the data-path delays of individual instructions are optimized separately, guided by profiling data corresponding to the target application class, maximizing the performance of frequently utilised instructions to the detriment of those which are less often executed. In this way instructions are divided into clock frequency classes according to their data-path delay and at run time the clock frequency is scaled to the value required by the class of the to be executed instruction. During the application execution different VP instances are dynamically configured in FPGA in order to create the most appropriate hardware support for optimizing the application performance in terms of throughput without increasing power consumption, and therefore reducing energy. As operating frequency changes induce a certain time penalty, which may potentially diminish the actual performance gain, the application code is optimised during the compilation in order to reduce the number of runtime clock switches via, e.g., loop tiling, instruction clustering. We evaluate the effectiveness of the proposed approach on several computational kernels used in image processing applications, i.e., sum of absolute differences, sum of squared differences, and Gaussian filtering. Our results indicate that an average instruction throughput increase of 20%, and a 15 % energy consumption reduction are achieved due to the utilisation of- runtime reconfiguration and fine-grained frequency scaling.

[Conference] GEORGESCU, Vlad, " Optimized SCADA Systems for Electrical Substations", ATEE - 2013 Advanced Topics in Electrical Engineering, 2013, pp. 1-4


A modern SCADA system (hardware and software) with specific characteristics for electrical substations is presented. This system leverages the newest technologies available and shows the correct way to implement them in order to have a precise and fault secure power grid. The technologies included in the system are: network time synchronization,
network communication redundancy through different types of ring topologies, specific SCADA software for electrical
At the end there is a proof of concept through which the practical way of implemeting these 3 technologies together is


[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Architectural Principles for One-Chip Parallel Computer", Recent Advances in Information Science. Proceedings of the 3rd European Conference of Computer Science, Paris, France, December 2-4, 2012, 2012, pp. 143-148.


This paper starts from the programmer’s view and states architectural principles for designing the one-
chip many processor computer. John Backus’s and Gary Sabot’s old visions about how a parallel computer must
be programmed are followed in the context of the current technologies. The proposed architectural principles are
exemplified with the Connex chip, a 1024-cell SPMD engine able to provide 120 GOPS/Watt, 6 GOPS/mm2 and
60 GOPS/$.

[Journal] PETRICĂ, Lucian, "A SIMD Approach to Thread Matching for Interleaved Multithreading", Romanian Journal of Information Science and Technology, 2012, pp. 215-228

Volume 15, Number 3


Interleaved multithreading processors offer improved performance and power efficiency in a multithreading environment compared to standard CPUs by allowing multiple threads to share a single processing pipeline. However, resource contention is a natural result of such a system and can determine how well the overall thread group performs on the processor. Selecting threads which perform well together has proven to be a difficult problem because it is computationally intensive and grows rapidly in complexity with the number of threads in the system. We propose a vector algorithm for this task which is able to significantly outperform a scalar implementation and which shows improved scaling characteristics 

[Journal] ŞTEFAN, Gheorghe M., "Cyber-Physical Society - iDemocracy", Journal of Control Engineering and Applied Informatics, Volume14, Issue 3, 2012, pp. 54-60


The concept of Cyber-Physical Society (CPSo) expands the concept of Cyber-Physical Systems (CPS) by including aspects related to knowledge, culture and society. Embedding computation in the control of our fast evolving society means mainly to trigger self-organizing mechanisms at any level in our complex world. The way democracy is exercised must benefit explicitly from the tremendous development of the information and communication technologies (ICT). ICT has a very big impact on various aspects of our life, but is missing a coherent approach for designing the appropriate environment for the benefit of people in their struggle with a ubiquitous corrupt political class, weak state and voracious corporations. ICT supported democratic power will allow to reconsider the manifest of the other two forms of power: the elitist form and the sacred form.

Keywords: democracy, participative democracy, ICT, forms of power, structured information, personal assistant linker. 

[Conference] PETRICĂ, Lucian, "Dynamic Power Management through Adaptive Task Scheduling for Multi-Threaded SIMD Processors", 10th International Symposium on Electronics and Telecommunications (ISETC), 2012, pp. 83-86


Power management is one of the most important issues in computer architecture today. Devices often operate on the edge of their thermal envelope and system designers must balance the power consumption of various system components in order to ensure safe operation. This paper proposes an adaptive scheduler for a multi-threaded SIMD processor which is able to trade performance for power consumption in order to stay within a given power budget. By moving threads between processor cores, the scheduler is able to create more opportunity for the use of aggressive power management techniques like clock gating. Evaluation shows the proposed algorithm enables more power savings than frequency scaling for various synthetic workloads.

[Journal] HOBINCU, Radu, PETRICĂ, Lucian, CODREANU, Valeriu, "GNU Compiler Collection Backend Port for the Integral Parallel Architecture", UBP Bulletin, 2012, pp. 79-92

Series C, Volume 74, Issue 3


This paper presents the process of porting the GCC compiler offered by the Free Software Foundation, for the hybrid Integral Parallel Architecture composed of an interleaved multithreading controller and a vectorial SIMD machine. It is well known that the main reason for which hybrid and vectorial machines are difficult to use efficiently, is programmability. In this paper we well show that by using an open-source compiler and the features it provides, we can ease the software developing process for complex applications.

[Journal] POPA, Cosmin, "“High-Accuracy Function Synthesizer Circuit with Applications in Signal Processing”", EURASIP Journal on Advanced in Signal Processing, 2012
[Book Chapter] ŞTEFAN, Gheorghe M., "Integral Humanism and Its Challenges", Mihai Spariosu & Jörn Rüsen (Ed.), Exploring Humanity – Intercultural Perspectives on Humanism, 2012, pp. 217-226
[Journal] POPA, Cosmin, "“Low-Voltage Improved Accuracy Gaussian Function Generator with Fourth-Order Approximation”", Microelectronics Journal, Volume: 43, Issue: 8, 2012, pp. 515-520
[Conference] GEORGESCU, Vlad, "Operations Management in Water and Wastewater Treatment Plants",  Applied Mechanics and Materials (Volume 245), Chapter 3: Manufacturing Systems, 2012, pp. 179-184


This paper presents a solution for implementing Operations Management Software (OMS) in SCADA systems and highlights the benefits of OMS in water and wastewater plants. The modern approach for implementing this kind of system in a Service Oriented Architecture (SOA) is also presented, with examples of how to develop systems.

[Journal] DASCĂLU, Monica, Eduard Franti, Lucian Milea, Marius Moga, Catalin Florea, Adrian Barbilian, Mihail Teodorescu, Paul Schiopu, Florin Lazo, Mark Edward Pogarasteanu, "Personalized support system for patients with forearm amputations", ROMJIST (ISI),Vol 15, nr.4, december 2012, pag 368-376, ISSN 1453-8245, WOS:000323706200006, 2012
[Journal] , "Spațiul deciziei reluctante Academica, Anul XXII, Nr. 3, Martie 2012", Academica, Volume XXII, Issue 3, 2012
[Journal] , "Stiinta integrativa a cunoasterii", in Academica, Anul XXII, Nr. 6-7, Iunie - Iulie 2012.", Academica, Volume XXII, Issues 6-7, 2012


[Journal] POPA, Cosmin, "“A 2.5GHz CMOS Mixer with Improved Linearity”", Journal of Circuits, Systems and Computers, Volume: 20, Issue: 2, 2011, pp. 233-242
[Conference] , MALIȚA, Mihaela, "Backus Language for Functional Nano-Devices ", CAS 2011, Sinaia, Oct. 2011, vol. 2, 2011, pp. 331-334


The emergent nano-technologies must be used to design functional nano-devices with complexity in the range of their size. The way to achieve this goal is to define parallel programmable engines. The concept of FP System, introduced by John Backus in 1978, is used to define a high level architectural environment: Backus-Connex Parallel Functional Programming System. The functional forms of FP Systems correspond perfect with the four types of parallelism derived for ConnexArrayTM from the Kleene’s computational model. The paper defines the BC programming environment, describes its implementation in Scheme and presents its use for developing real applications for functional nano-devices.

Keywords: nano-electronics, functional electronics, programmable circuits, parallelism, functional programming.

[Journal] POPA, Cosmin, "“Current-Mode Euclidean Distance Circuit Independent on Technological Parameters”", International Journal of Electronics, Volume: 98, Issue: 11, 2011, pp. 1483-1501
[Journal] ŞTEFAN, Gheorghe M., MILEA, P. L., MOGA, M., MITULESCU, S., CERNAT, E., MOLDOVAN, C., OLTU, O., POMPILIAN, S., "Hardware & Software Package for Locomotory Disabled Patient Training", International Journal of System Engineering, Applications and Development, Volume 5, Issue 1, 2011, pp. 436-443
[Conference] HOBINCU, Radu, PETRICĂ, Lucian, CODREANU, Valeriu, "Increasing vector processor pipeline efficiency with a thread-interleaved controller", 15th International Conference on System Theory, Control, and Computing (ICSTCC), 2011, pp. 1 - 4


Vector processors are a fast and energy-efficient way of executing code with large amounts of data parallelism. Programmability has however been a difficult topic and has limited vector processors to a few niche applications. Recent advances in compiler auto-vectorization promise to make vector processors relevant for general-purpose computing. However, compiler-generated code is inefficient and makes poor use of vector resources, which are often the most area and power-consuming devices within a processing system. We propose adapting interleaved multi-threading, a proven technique for increasing pipeline efficiency of scalar processors, to improve utilization of vector resources, thereby providing gains in speed as well as potential reduction in energy consumption.

[Journal] ŞTEFAN, Gheorghe M., "Informația fenomenologică și filosofia profunzimilor la început de mileniu", Academica, Volume XXI, Issues 4-5, 2011
[Conference] ŞTEFAN, Gheorghe M., FRANȚI, E., SCHIOPU, P., PLAVIȚU, A., BOROȘ, T., "Modular Software for Artificial Arm Design", Proceedings of International Conference on Automatic Control, Modelling & Simulation (ACTMOS'11), Spain, 2011, pp. 387-391
[Journal] POPA, Cosmin, "“Multifunctional CMOS Structure with Improved Linearity”", Journal of Circuits, Systems and Computers, Volume: 20, Issue: 7, 2011, pp. 1261-1275
[Conference] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Parallel RISC Architecture. A Functional Approach Based on Backus's FP language", Proceedings of the 2011 International Conference on Parallel and Distributed Processing Techniques and Applications, Las Vegas, 2011, 2011, pp. 492-498


The main consequence of building ad hoc structured hardware for parallel computation is the huge difficulty we have to program it. The paper discusses a new framework introducing the concept of parallel RISC engine, as a simple and efficient solution for executing FP like languages proposed by John Backus [2] as an alternative to the von Neumann style of performing computation. A first version for the hardware solution is already implemented in silicon.

[Book] POPA, Cosmin, "“Synthesis of Computational Structures for Analog Signal Processing”", 2011
[Journal] CRISTEA, Miron, "Unified model for p-n junction current-voltage characteristics", Central European Journal of Engineering (CEJE), Volume 1, Number 1, DOI: 10.2478/s13531-011-0006-9, 2011, pp. 113-116


The current/voltage characteristics of p-n junctions, part of nearly all electronic semiconductor devices, have been analysed until now separately at low or high injection levels. For the first time, this work gives a unified model, based on the physical phenomena, for the I/V characteristics of the p-n junction.


[Journal] MANOLESCU, Anca, POPA, Cosmin, "“CMOS Differential Structure with Improved Linearity and Increased Frequency Response”", Revue Roumaine des Sciences Techniques, Volume: 55, Issue: 2, 2010, pp. 91-200
[Journal] POPA, Cosmin, "“CMOS Logarithmic Curvature-Corrected Voltage Reference by Using a Multiple Differential Structure”", Revue Roumaine des Sciences Techniques, Volume: 55, Issue: 4, 2010, pp. 436-444
[] ŞTEFAN, Gheorghe M., "Integral Humanism Conference on Intercultural Humanism, Oxford, 9-12 September 2010", Conference on Intercultural Humanism, Oxford, 9-12 September 2010, 2010


Integral humanism refers to an ideal human being challenged by an imaginable, perhaps utopian, global world. It is about an integral human being, equally spiritual, imaginative and rational, confronted with the three global networks – the functionally-hierarchical one of states, the concurrent one of corporations and the cooperative one of the civil society – he created in order to survive well balanced within the wholeness of existence. Integral humanism looks like a dream, but, unfortunately seems to be the only solution for the too skilled, tricky and apparent spiritual being who dominates a limited natural environment in a recklessly authoritarian manner, while he is unable to dominate at least his inner and so (maybe too) ``close" natural instincts. Already proposed solutions, stressing by turn on rational or spiritual constructs at the level of the human mind or of the world we live in, proved to be worthless because of their simplicity. We must try a more complex one, maybe will be simpler to apply it.

[Conference] HOBINCU, Radu, PETRICĂ, Lucian, ŞTEFAN, Gheorghe M., BUMBĂCEA, Petronela, CODREANU, Valeriu, "Integral Parallel Architecture in System-on-Chip Designs", CAS 2010 Proceedings, vol.1, 2010, pp. 35-42


The computational structures are not able to scale following
the increased number of components offered by the
technological development driven by the Moore’s law. In
order to use efficiently the emerging nanotechnologies new
architectural approaches are requested. Thus, new
technology driven architectures must be developed. The
proposed architecture is designed in this technologically
evolving context, to support the increasing computational
diversity, complexity and intensity requested in the
emergent domain of parallel embedded computing. The
resulting physical embodiment has at least two orders of
magnitude higher effective GIPS/Watt and GIPS/mm2 than
the currently produced structures. This new architectural
approach is based on ConnexArrayTM technology, already
developed and tested on real chips, and on the Bubble-free
Embedded Architecture for Multithreading execution
model. The paper proposes a computational platform able
to manage tens of threads and a number of
execution/processing units which starts from tens and goes
up to thousands.

[Conference] ŞTEFAN, Gheorghe M., "Integral Parallel Architecture in System-on-Chip Designs", The 6th International Workshop on Unique Chips and Systems, Atlanta, GA, USA, December 4, 2010, 2010, pp. 23-26


The ubiquitousness of the parallel computational resources emerges in the rapid growing market of system-onchip. Both, complex and intense computations are requested for solving the fast expanding functional spectrum of the mobile products. The current approach is unable to provide low area and low power solutions for the increased functional hungry. The proposed Integral Parallel Architecture (IPA) provides >100x increase for GIPS/Watt and GIPS/mm2 than the current structures. This new approach is based on ConnexArrayTM technology, developed and tested on real chips, and on the Bubble-free Embedded Architecture for Multithreading (BEAM) execution. It is proposed an IP based model to manage tens of threads and a number of execution or processing units which starts from tens and goes up to thousands.

[Journal] POPA, Cosmin, "“Low-Power Low-Voltage Superior-Order Curvature Corrected Voltage Reference”", International Journal of Electronics, Volume: 97, Issue: 6, 2010, pp. 613-622
[Journal] POPA, Cosmin, "“Low-Voltage Low-Power Superior-Order Curvature Corrected Voltage Reference”", Journal on Analog Integrated Circuits and Signal Processing, Volume: 63, Issue: 2, 2010, pp. 233-238
[Journal] ŞTEFAN, Gheorghe M., MALIȚA, Mihaela, "Many-Processor & Kleene's Model", Scientific Buletin of UPB, serie C, Volume 5, Issue 3, 2010, pp. 199-212


According to [1], [2] more than one processor means multi-processors, while many-processors refers to big-n processors. The theoretical foundation for the two kinds of parallel machines is different and is meaningful for understanding the evolution of computer science in the emerging parallel computing era. While a multi-processor is a construct starting from Turing's model of computation, a many-processor is better explained in a different conceptual environment. We propose Kleene's model as a theoretical framework for describing the many-processor paradigm. In order to exemplify the many-processor approach the architecture of the BA1024 chip, a fully programmable SoC, is presented.

[Conference] ŞTEFAN, Gheorghe M., CALFA, Ana-Maria, "Matrix Computation on the Connex Parallel Architecture International Conference on Signals and Electronic Systems, Gliwice, Poland, Sept. 2010.", International Conference on Signals and Electronic Systems, Gliwice, Poland, Sept. 2010., 2010
[Conference] HOBINCU, Radu, PETRICĂ, Lucian, ŞTEFAN, Gheorghe M., BUMBĂCEA, Petronela, CODREANU, Valeriu, "Technology Driven Architecture for Integral Parallel Embedded Computing CAS 2010 Proceedings, vol.1, pag.35-42.", CAS 2010 Proceedings, Volume 1, 2010, pp. pag.35-42.


The computational structures are not able to scale following the increased number of components offered by the technological development driven by the Moore’s law. In order to use efficiently the emerging nanotechnologies new architectural approaches are requested. Thus, new technology driven architectures must be developed. The proposed architecture is designed in this technologically evolving context, to support the increasing computational diversity, complexity and intensity requested in the emergent domain of parallel embedded computing. The resulting physical embodiment has at least two orders of magnitude higher effective GIPS/Watt and GIPS/mm2 than the currently produced structures. This new architectural approach is based on ConnexArrayTM technology, already developed and tested on real chips, and on the Bubble-free Embedded Architecture for Multithreading execution model. The paper proposes a computational platform able to manage tens of threads and a number of execution/processing units which starts from tens and goes up to thousands.


[Book] DASCĂLU, Monica, Eduard Franți, "Automate celulare. Modelare și aplicații", 2009, pp. 140 pages
[Conference] ŞTEFAN, Gheorghe M., "One-Chip TeraArchitecture", Proceedings of the 8th Applications and Principles of Information Science Conference, Okinawa, Japan on 11-12 January 2009., 2009


The distinction between the complex computation and the intense computation is presented in order to introduce TeraArchitecture, a high-performance architecture which integrates all kinds of parallelism in order to optimize area & power. Multi-processors are efficient for multi-threaded complex computations, while many-processors are efficient in data intense computations. Combining them results an efficient solution for the “Tera Computing Era”.


Keywords: parallel computing, computer architecture, multi-processors, many-processors, power-aware design.

[Book] POPA, Cosmin, “Superior-Order Curvature-Correction Techniques for Voltage References“, Springer Publishing House, New York, 2009


[Book] DOBRESCU, Dragoş, DOBRESCU, Lidia, Basics of the Semiconductor Devices Physics, Ed. Printech, Editură recunoscută de Consiliul Naţional al cercetării Ştiinţifice din Învăţământul Superior-Cod CNCSIS 54, Bucureşti, 2005


[Book] DOBRESCU, Dragoş, DOBRESCU, Lidia, A. Rusu, Dispozitive si Circuite Electronice note de curs si probleme rezolvate, Ed. Printech, Editură recunoscută de Consiliul Naţional al cercetării Ştiinţifice din Învăţământul Superior-Cod CNCSIS 54, Bucureşti, 2003


[Book] DOBRESCU, Dragoş, DOBRESCU, Lidia, Modelarea avansată a dispozitivelor MOS, Ed. Printech, Editură recunoscută de Consiliul Naţional al cercetării Ştiinţifice din Învăţământul Superior-Cod CNCSIS 54, Bucureşti, 2002