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Announcements and events – October 2015 < Back

Optional Course: FPGA/ASIC Verification

Optional Course: FPGA/ASIC Verification

DCAE department together with the AMIQ Consulting organize the optional course

FPGA/ASIC Verification

The course is designed for students in year III, semester I, who have graduated Digital Integrated Circuits and Object Oriented Programming courses.

Course structure:

  • Weekly 4 hours laboratory where teaching and exercise are interleaved - hands-on approach
  • The courses will begin in the week starting on the 2nd of November
  • A maximum of 20 students in class
  • The course will take place in the Infineon laboratory

People involved:

  • Lucian Petrică - DCAE department
  • Ștefan Birman - AMIQ Consulting


  • Functional Verification Cycle
  • Functional Verification Metrics
  • Verification Planning
  • Verification Environment Design
  • Stimuli and Scenario Design
  • Monitors and Checkers
  • Verification Closure
  • 100% Hands-on
  • SystemVerilog, UVM
  • SystemVerilog Assertions

Useful links:

The weekday and time slot allocated for the course will be decided depending on signups.

For signing up and questions, send an e-mail to with the subject "Verification", specifying your name, current group, and the grades for Digital Integrated Circuits and Object Oriented Programming courses.

Published on October 14, 2015, 13:55.