Optional Course: FPGA/ASIC Verification

DCAE department together with the AMIQ Consulting organize the optional course

FPGA/ASIC Verification

The course is designed for students in year III, semester I, who have graduated Digital Integrated Circuits and Object Oriented Programming courses.

Course structure:

• Weekly 4 hours laboratory where teaching and exercise are interleaved - hands-on approach
• The courses will begin in the week starting on the 2^nd of November
• A maximum of 20 students in class
• The course will take place in the Infineon laboratory

People involved:

• Lucian Petrică - DCAE department
• Ștefan Birman - AMIQ Consulting

Curricula:

• Functional Verification Cycle
• Functional Verification Metrics
• Verification Planning
• Verification Environment Design
• Stimuli and Scenario Design
• Monitors and Checkers
• Verification Closure
• 100% Hands-on
• SystemVerilog, UVM
• SystemVerilog Assertions

Useful links:

• AMIQ Summer School: http://www.dcae.pub.ro/anunturi/11/amiq-summer-school-2015/
• AMIQ Blog: http://www.amiq.com/consulting/2015/08/05/hardware-verification-summer-course-at-politehnica-university-of-bucharest/

The weekday and time slot allocated for the course will be decided depending on signups.

For signing up and questions, send an e-mail to signup@dcae.pub.ro with the subject "Verification", specifying your name, current group, and the grades for Digital Integrated Circuits and Object Oriented Programming courses.