Coordinated by: Ștefan Birman
The quality of an electronic system depends in great measure on the effectiveness of the functional verification of the system and the time and effort put into this activity. For this reason, up to 60% of the total development effort for a new electronic product is spent in verification activities. For the same reason, there is great demand in the industry for highly trained verification engineers, capable of designing and implementing a verification plan. This course offers students the opportunity to learn about functional verification and gain the skills required to be able to integrate into a verification team at any employer without significant supplementary training.
This course covers methodologies and technologies for the functional verification of digital circuits and systems on chip.
Students will learn and practice with:
1. Designing and implementing a verification plan
2. Program in SystemVerilog
3. Evaluate the results of verification
4. Debugging techniques