FPGA/ASIC Verification Course

The DCAE department together with AMIQ Consulting organize the optional course on the functional verification of FPGA and ASIC digital circuits. The course is designed for students in year III, semester I, who have graduated Digital Integrated Circuits and Object Oriented Programming courses. Students in ELA, TST, RST, and MON can presently sign up for this course here

Course structure:

• Weekly 2 hours course work and 2 hours laboratory where teaching and exercise are interleaved - hands-on approach
• Practical exercises with real-world verification software, utilized by numerous companies worldwide
• The course will take place in the Infineon laboratory in the ETTI campus

People involved:

• Lucian Petrică - DCAE department
• Ștefan Birman - AMIQ Consulting

Curricula:

• Functional Verification Cycle
• Functional Verification Metrics
• Verification Planning
• Verification Environment Design
• Stimuli and Scenario Design
• Monitors and Checkers
• Verification Closure
• SystemVerilog, UVM
• SystemVerilog Assertions

Useful links about past editions of this course (including summer schools): Summer School 2016

The weekday and time slot allocated for the course will be decided depending on signups. The course will be taught in Romanian but all course materials are in English.